CEMRVL=CEMRVL_0, CEIES=CEIES_0, CEON=CEON_0, CEFDLY=CEFDLY_0, CEOUTPOL=CEOUTPOL_0, CESHORT=CESHORT_0, CEPWRMD=CEPWRMD_0, CEF=CEF_0, CEMRVS=CEMRVS_0
Comparator Control Register 1
| CEOUT | Comparator output value |
| CEOUTPOL | Comparator output polarity 0 (CEOUTPOL_0): Noninverted 1 (CEOUTPOL_1): Inverted |
| CEF | Comparator output filter 0 (CEF_0): Comparator output is not filtered 1 (CEF_1): Comparator output is filtered |
| CEIES | Interrupt edge select for CEIIFG and CEIFG 0 (CEIES_0): Rising edge for CEIFG, falling edge for CEIIFG 1 (CEIES_1): Falling edge for CEIFG, rising edge for CEIIFG |
| CESHORT | Input short 0 (CESHORT_0): Inputs not shorted 1 (CESHORT_1): Inputs shorted |
| CEEX | Exchange |
| CEFDLY | Filter delay 0 (CEFDLY_0): Typical filter delay of TBD (450) ns 1 (CEFDLY_1): Typical filter delay of TBD (900) ns 2 (CEFDLY_2): Typical filter delay of TBD (1800) ns 3 (CEFDLY_3): Typical filter delay of TBD (3600) ns |
| CEPWRMD | Power Mode 0 (CEPWRMD_0): High-speed mode 1 (CEPWRMD_1): Normal mode 2 (CEPWRMD_2): Ultra-low power mode |
| CEON | Comparator On 0 (CEON_0): Off 1 (CEON_1): On |
| CEMRVL | This bit is valid of CEMRVS is set to 1 0 (CEMRVL_0): VREF0 is selected if CERS = 00, 01, or 10 1 (CEMRVL_1): VREF1 is selected if CERS = 00, 01, or 10 |
| CEMRVS | This bit defines if the comparator output selects between VREF0 or VREF1 if CERS = 00, 01, or 10. 0 (CEMRVS_0): Comparator output state selects between VREF0 or VREF1 1 (CEMRVS_1): CEMRVL selects between VREF0 or VREF1 |